1. Field of the Invention
The present invention relates to a data multiplexing system which multiplexes and demultiplexes digital signals between a plurality of low-speed transmission lines and a high-speed transmission line in a digital communication network.
2. Description of the Related Art
A technique stated in, for example, "Teranishi and Kitamura: Design of Transmission Facilities of Digital Network (published by the Association of Telecommunication)" has been known as regards a data multiplexing system in the prior art for multiplexing and demultiplexing digital signals between a plurality of low-speed transmission lines and a high-speed transmission line in a digital communication network.
FIG. 15 of the accompanying drawings illustrates the architecture of such a prior-art data multiplexing system.
As shown in the figure, the data multiplexing system 40 is constructed of low-speed interface modules 43 each of which collects low-speed transmission lines 41 and converts them into signals (synchronized signals) suitable for data multiplexing (and also converts such synchronized signals into digital signals), a multiplexer/demultiplexer 44 which collects the signals (synchronized signals) sent from the low-speed interface modules 43 and multiplexes them (and also demultiplexes a multiple signal into such synchronized signals), and a high-speed interface module 45 which is connected with the multiplexer/demultiplexer 44 so as to interface with a high-speed transmission line 42.
Herein, as depicted in the figure, the multiplexer/demultiplexer 44 exchanges the signals with the individual low-speed interface modules 43 through separate signal lines.
Referring also to FIG. 16, the low-speed digital signals via the low-speed transmission lines 41 (input signals A, B and C) having entered the data multiplexing system 40 are all synchronized to a reference phase included in the system 40, by the respectively corresponding low-speed interface modules 43. Thereafter, the synchronized signals A, B and C are respectively sent to the multiplexer/demultiplexer 44. In the multiplexer/demultiplexer 44, the synchronized signals A to C sent from the low-speed interface modules 43 are read out sequentially in accordance with a clock synchronous with the high-speed transmission line 42. Thus, the plurality of low-speed digital signals are finally multiplexed into the multiple signal N, which is sent to the high-speed transmission line 42 through the high-speed interface module 45.
On the contrary, the high-speed digital signal (multiple signal) having entered the data multiplexing system 40 from the high-speed transmission line 42 is demultiplexed by the multiplexer/demultiplexer 44, and the resulting signals are sent from the low-speed interface modules 43 to respectively corresponding low-speed transmission lines 41.
As stated above, in the prior-art data multiplexing system 40, the multiplexer/demultiplexer 44 exchanges the signals individually with the respective low-speed interface modules 43.
According to such a scheme, however, the nodes of the respective low-speed interface modules 43 with the multiplexer/demultiplexer 44 in the data multiplexing system 40 need to be separately formed.
Therefore, the data multiplexing system 40 has tended to become large in size. Another problem has been that the relationships between the multiplexer/demultiplexer 44 and the individual low-speed interface modules 43 are sometimes determined to a certain degree by the separately formed nodes, so flexible data multiplexing and demultiplexing are difficult.